1. Field of the Invention
The present invention-relates to the wiring, or connecting, of electric networks for switching load reduction, voltage limitation and/or oscillation attenuation, in particular to the utilization of monolithically integrated snubber devices for the above-mentioned purposes in power electronics and high-frequency engineering.
2. Description of Prior Art
In electronic circuits, with each switching operation there is a risk of exciting parasitic oscillations. This is intended to mean oscillations within resonant circuits formed from undesired electric energy stores, i.e. parasitic inductances and capacitances. In real devices and assembly techniques, these parasitic elements are, in principle, inevitable. Examples thereof are the self-capacitances of semiconductor devices, the line inductances of electric connections, or the leakage inductances and winding capacitances of transformers.
Excitation of parasitic resonant circuits is effected by edges within the currents or voltages of a circuit. The resulting oscillations form a source for electromagnetic interference, which may lead to malfunctions within electronic circuits, and which significantly complicate compliance with the relevant EMV norms as high-energy narrow-band interferers. To reduce the amplitudes of parasitic oscillations, what is required is either to reduce the slope of the exciting current or voltage edges, and/or to increase the attenuation of the causal parasitic resonant circuit.
FIG. 1a shows, by way of example, a series resonant circuit consisting of the elements L, C, and of an attenuation resistor R. FIG. 1b describes the step response of this resonant circuit for different attenuations. For values of attenuation D within the range from 0.5-1, an optimum switching edge with a high level of steepness and, at the same time, with no or only little overshoot is achieved.
In real circuits it is generally not justifiable, for reasons of power dissipation, connecting the attenuation resistor immediately in parallel with a component of the parasitic resonant circuit. FIG. 2 shows a network to be wired which comprises a voltage source 200 providing a voltage Vin, a MOSFET 202 and a parasitic line inductance L. The MOSFET additionally comprises a parasitic capacitance C depicted as a separate element. It represents an energy store to be wired with a snubber network, exemplary wiring topologies being shown by networks A, B, and C in FIG. 2. If, for example, an attenuation resistor were connected in parallel with parasitic capacitance C formed by the drain-source capacitance of power MOSFET 202 (FIG. 2), what would permanently arise in the attenuation resistor, with the MOSFET switched off, is a power dissipation proportional to the square of the drain-source voltage VDS.
However, for the attenuation action desired it is generally sufficient to allow the attenuation resistor to become active within the area of the switching edge only, and to decouple it from the circuit in a stationary manner. This may be achieved, as is depicted in attenuation network A in FIG. 2, by a coupling capacitor C1 in series with resistor R1. This coupling capacitor is preferably dimensioned such that its impedance, with the oscillation frequency to be attenuated, roughly corresponds to ½ to ½π of the value of attenuation resistor R1.
But even with a coupling capacitor, power dissipation will arise in the attenuation resistor, the power dissipation roughly corresponding to the energy stored within the parasitic resonant circuit, multiplied by the switching frequency. It is this energy withdrawal that the mode of operation of the attenuation resistor is based on. The respective power dissipation is therefore inevitable, and in real applications it may take on substantial values and require effective cooling of the resistor.
A further critical point is that the resistor can only perform its function if coupling to the resonant circuit to be attenuated is performed at an extremely low inductance. Otherwise, the parasitic inductance of the feed line will decouple the attenuation resistor from the resonant circuit to be attenuated precisely during the switching edge, and thus will considerably reduce the effect of the attenuator.
What has been described results in requirements placed upon the attenuation network A consisting of resistor R1 and coupling capacitor C1. The resistance of R1 should be adjustable to the characteristic impedance Z0 of the parasitic LC resonant circuit to be attenuated (for an optimum attenuation behavior), and may range between 0.5 Ω and 100 Ω. The resistor should be effectively coolable. The attenuation network should comprise a low-inductance structure and a high level of pulse handling capability. In addition, there should be compatibility, in terms of assembly techniques, with the circuit to be attenuated (e.g. power module) for simple assembly with extremely small parasitic connection inductances.
In addition to purely attenuating a parasitic resonant circuit, a further possibility of reducing the amplitudes of parasitic oscillations is to reduce the slope of the exciting current or voltage edge. This is possible, for example, with a so-called dV/dt limiter such as network B in FIG. 2. Network B comprises a capacitance C2 in series with a resistor R2, and a diode D2 connected in parallel with resistor R2. Such a network is also very frequently used for protecting devices of limited dV/dt stabilities, such as thyristors, triacs or GTOs.
During the positive voltage edge (here, during the drain-source voltage), diode D2 places capacitor C2 directly in parallel with the circuit element at which the dV/dt limitation is to be effected. The process of charging C2 immediately results in the desired limitation of the slope of the positive voltage edge. Resetting the voltage at C2, i.e. discharging C2, is performed during the ON phase of the switch via discharging resistor R2, which may range between 10 Ω and 500 Ω. Diode D2 and capacitor C2 are exposed to very high peak loads. During the phase of the voltage increase, virtually the entire load current from the device switching off (here the MOSFET) commutes to these two elements of the dV/dt limiter.
A third, very frequently used wiring is the voltage limiter in accordance with FIG. 2, network C. Network C comprises a resistor R3 in parallel with a capacitance C3, the parallel connection of R3 and C3 being serially connected to a diode D3.
If the voltage present at the device to be protected (here, MOSFET 202) exceeds the voltage present at capacitor C3, diode D3 will clamp the voltage (VDS) to the value of the voltage present at C3. Unlike networks A and B, with network C the capacitance of C3 is typically selected to be so large that the voltage present at this capacitor will only slightly change due to the energy to be clamped in a switching operation. Between two switching operations, resistor R3 sees to the conversion of the energy supplied per clamping operation to heat, and it may range between 500 Ω and 10 kΩ. Thus, the means voltage present at C3 results from a balance between the energy supplied and the energy converted to heat within R3.
For a high level of efficiency, in networks B and C, the current path from the terminals of the network across the diode and the capacitance must be configured to be particularly low in inductance (whereas the current path via the resistor is uncritical, specifically within network C).
In principle, snubber networks for switching load reduction, or for limiting the stress on the switch, voltage limitation and/or oscillation attenuation, referred to as so-called snubber networks, may be divided up into passive and active networks. Passive networks consist of passive devices (resistors, capacitances, inductances and diodes), and active networks additionally contain one or several active switches (e.g. MOS devices). A special case are networks comprising non-linear devices such as Z diodes, varistors, actively clamped switches, or current limiters which limit voltages or currents in accordance with their characteristic curves.
Snubber networks withdraw energy from parasitic reactances of an electronic circuit. Depending on whether this energy is converted to heat or is fed back into the circuit, one differentiates between dissipative and regenerative snubber networks. To attenuate parasitic oscillations, use is made virtually exclusively of dissipative snubber networks. Networks A, B and C of FIG. 2 work in a dissipative manner.
In accordance with the prior art, snubber networks for power electronics are constructed from discrete devices. Integrated solutions for applications in the voltage range of up to several hundred volts and for peak currents of up to several hundred amperes have not hitherto been known. Integrated networks, e.g. on the basis of thick-film or LTCC technologies, have been available only for filtering signal lines. In discretely structured snubber networks, what is predominantly utilized are foil and ceramic capacitors, due to the high demands placed upon the alternating-current handling capability. The electric series resistance of a ceramic capacitor is typically not sufficient for using the capacitor as a snubber device. Even if the series resistance were increased, the resulting device would be difficult to cool due to its high thermal resistance, and thus it would be poorly suited as a snubber device. RC attenuators structured in accordance with network A in FIG. 2 place particularly high demands upon the resistor. To this end, low-inductance metal film resistors are employed, in the high performance range, composition resistors are also employed. Even with power losses of a few watts in the resistor, a sufficiently low-inductance architecture of the network cannot be realized, in accordance with the prior art, due to the spatial expansion of the individual devices and to the necessity of cooling. In view of the increasingly steep current and voltage edges in modern power-electronic systems, this represents a considerable problem.
The requirements placed upon an extremely low self-inductance of the snubber networks are increasingly difficult to meet, with increasing levels of power, due to the spatial expansion of classical devices such as capacitors, power diodes, and power resistors, as well as due to the cooling required.